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19-1204; Rev 0; 3/97
8-Bit, High-Speed DAC
_______________General Description
The MAX5018 is a monolithic, 8-bit digital-to-analog converter (DAC) capable of accepting video data at 165Msps or 275Msps. Complete with video controls (sync, blank, reference white (force high), and bright), the MAX5018 directly drives doubly terminated 50 or 75 loads to standard composite video levels. Standard setup level is 7.5IRE. The MAX5018 is pin compatible with the HDAC10180 and the TDC1018, with improved performance. The MAX5018 contains data and control input registers, video control logic, reference buffer, and current switches. Two performance grades of the MAX5018 are available. Both are packaged in a 24-pin PDIP in the -20C to +85C industrial temperature range.
____________________________Features
o 275Msps Conversion Rate (MAX5018A) 165Msps Conversion Rate (MAX5018B) o TDC1018 and HDAC10180 Compatible with Improved Performance o RS-343-A Compatible o Complete Video Controls: Sync, Blank, Bright, and Reference White (force high) o ECL Compatible o Single Power Supply o Registered Data and Video Controls o Differential Current Outputs o ESD-Protected Data and Control Inputs
MAX5018
________________________Applications
High-Resolution Color or Monochrome Raster Graphics Displays to 1500 x 1800 Pixels Medical Electronics: CAT, PET, and MRI Displays CAD/CAE Workstations Solids Modeling General-Purpose, High-Speed Digital-to-Analog Conversion Digital Synthesizers Automated Test Equipment Digital Transmitters/Modulators
______________Ordering Information
PART MAX5018AIPG MAX5018BIPG TEMP. RANGE -20C to +85C -20C to +85C PIN-PACKAGE 24 Plastic DIP 24 Plastic DIP
__________________Pin Configuration
TOP VIEW
D3 1 D2 2 D1 3 D0 4 VEE 5 CONV 6 CONV 7 FT 8 VCC 9 FH 10 Blank 11 BRT 12 24 D4 23 D5 22 D6 21 D7
________________Functional Diagram
MAX5018
20 VEE 19 Out+ 18 Out17 VCC 16 COMP 15 Ref+ 14 Ref13 Sync
MAX5018
DIP
________________________________________________________________ Maxim Integrated Products
1
For the latest literature: http://www.maxim-ic.com, or phone 1-800-998-8800
8-Bit, High-Speed DAC MAX5018
ABSOLUTE MAXIMUM RATINGS
Supply Voltage VEE (measured to VCC)..........................................-7.0V to 0.5V Input Voltages CONV, Data, and Controls (measured to VCC)........VEE to 0.5V Ref+ (measured to VCC) ..........................................VEE to 0.5V Ref- (measured to VCC)............................................VEE to 0.5V Operating Temperature Ranges Ambient .............................................................-20C to +85C Junction..........................................................................+175C Lead Temperature (soldering, 10sec) .............................+300C Storage Temperature Range .............................-60C to +150C
Stresses beyond those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
DC ELECTRICAL CHARACTERISTICS
(VCC = ground, VEE = -5.2V 0.3V, CC = 0pF, ISET = 1.105mA, TA = TMIN to TMAX, unless otherwise noted.) PARAMETER Integral Linearity Error Differential Linearity Error Gain Error Gain-Error Tempco Input Capacitance, Ref+, RefCompliance Voltage, Positive Output Compliance Voltage, Negative Output Equivalent Output Resistance Output Capacitance Maximum Current, Positive Output Maximum Current, Negative Output Output Offset Current Input Voltage, Logic High Input Voltage, Logic Low Convert Voltage, Common-Mode Range Convert Voltage, Differential Input Current, Logic Low, Data and Controls Input Current, Logic High, Data and Controls Input Current, Convert IIL IIH ICONV ROUT COUT IO+(MAX) IO-(MAX) IOS VIH VIL CREF SYMBOL ILE DLE CONDITIONS 1.0mA < ISET < 1.3mA 1.0mA < ISET < 1.3mA TEST LEVEL VI VI VI V V VI VI VI V IV IV VI VI VI IV IV VI VI VI -0.5 0.4 35 40 2 -1.0 -1.5 -2.5 1.2 120 120 60 45 -45 0.05 0.5 -1.2 -1.2 20 12 MIN -0.37 -0.95 -0.2 -0.5 -6.5 150 5 1.5 1.5 TYP MAX 0.37 0.95 0.2 0.5 6.5 UNITS % Full Scale LSB % Full Scale LSB % Full Scale ppm/C pF V V k pF mA mA LSB V V V V A A A
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8-Bit, High-Speed DAC
DC ELECTRICAL CHARACTERISTICS (continued)
(VCC = ground, VEE = -5.2V 0.3V, CC = 0pF, ISET = 1.105mA, TA = TMIN to TMAX, unless otherwise noted.) PARAMETER Input Capacitance, Data and Controls Power-Supply Sensitivity Supply Current SYMBOL CIN CONDITIONS TEST LEVEL V VI VI -120 MIN TYP 3 20 155 120 220 MAX UNITS pF A/V mA
MAX5018
IEE
AC ELECTRICAL CHARACTERISTICS
(RL = 37.5, CL = 5pF, ISET = 1.105mA, TA = +25C, unless otherwise noted.) PARAMETER Maximum Conversion Rate SYMBOL MAX5018B MAX5018A tR 10% to 90% G.S., TA = TMIN to TMAX 10% to 90% G.S., RL = 25 To 0.2% G.S. To 0.8% G.S. To 0.2% G.S., RL = 25 TA = TMIN to TMAX TA = TMIN to TMAX B Grade A Grade Area = 1/2VT TA = +25C TA = TMIN to TMAX TA = +25C TA = TMIN to TMAX 20% to 80% G.S., TA = +25C TA = TMIN to TMAX TA = TMIN to TMAX CONDITIONS TEST LEVEL III III III IV V V V V III IV III IV III III V V III IV III IV III IV III IV MIN 165 275 1.6 2.0 1.0 7.0 5.5 4.5 2.2 3.2 3.0 1.8 4 1.0 1.0 1.0 0.5 0.5 390 325 -48 -48 TYP MAX UNITS Msps Msps ns
Rise Time
Current Settling Time, Clocked Mode Clock to Output Delay, Clocked Mode Data to Output Delay, Transparent Mode Convert Pulse Width, (low or high) Glitch Energy Reference Bandwidth, -3dB Setup Time, Data and Controls Hold Time, Data and Controls Slew Rate Clock Feedthrough
tSI
ns 4.0 4.5 6.0 6.0
tDSC tDST tPWL, tPWH
ns ns ns pV-s MHz ns ns V/s dB
tS tH
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8-Bit, High-Speed DAC MAX5018
TEST-LEVEL CODES All electrical characteristics are subject to the following conditions: All parameters having min/max specifications are guaranteed. The Test Level column indicates the specific device testing actually performed during production and Quality Assurance inspection. Any blank section in the data column indicates that the specification is not tested at the specified condition. Unless otherwise noted, all tests are pulsed tests; therefore, Tj = TC = TA. TEST LEVEL I II III IV V VI TEST PROCEDURE 100% production tested at the specified temperature. 100% production tested at TA = +25C, and sample tested at the specified temperatures. QA sample tested at only the specified temperatures. Parameter is guaranteed (but not tested) by design and characterization data. Parameter is a typical value for reference only. 100% production tested at TA = +25C. Parameter is guaranteed over specified temperature range.
______________________________________________________________Pin Description
PIN 1, 2, 3 4 5, 20 6 7 8 9, 17 10 11 12 13 14 15 16 18 19 21 22, 23, 24 NAME D3, D2, D1 D0 VEE CONV CONV FT VCC FH Blank BRT Sync RefRef+ COMP OutOut+ D7 D6, D5, D4 Data Bits 3, 2, and 1 Data Bit 0 (LSB) Negative Supply Convert Clock Input Convert-Clock-Input Complement Register Feedthrough Control Positive Supply Data Force-High Control Video Blank Input Video Bright Input Video Sync Input Reference Current, Negative Input Reference Current, Positive Input Compensation Input Output Current Negative Output Current Positive Data Bit 7 (MSB) Data Bits 6, 5, and 4 FUNCTION
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8-Bit, High-Speed DAC
_______________Detailed Description
The MAX5018 is an ultra-high-speed video digital-toanalog converter (DAC) capable of up to 275Msps conversion rates. This high speed makes the device suitable for driving 1500 x 1800 pixel displays at 70Hz to 90Hz update rates. The MAX5018 is separated into different conversionrate categories, as shown in Table 1. The MAX5018 has ECL logic-level-compatible video controls and data inputs. The complementary analog output currents produced by the devices are proportional to the product of the digital control and data inputs in conjunction with the analog reference current. The MAX5018 is segmented so that the input data's four MSBs are separated into a parallel thermometer code. From here, fifteen identical current sinks are driven to fabricate sixteen coarse output levels. The remaining four LSBs drive four binary-weighted current switches. MSB currents are then summed with the LSBs that contribute one-sixteenth of full-scale to provide the 256 distinct analog output levels. The video-control inputs drive weighted current sinks, which are added to the output current to produce composite video-output levels. These controls (sync, blank, reference white (force high), and bright) are required in video applications. A feature that similar video DACs do not have is feedthrough control. The feedthrough pin (FT) allows registered or unregistered operation of the video control and data inputs. In registered mode, the composite functions are latched to the pixel data to prevent screenedge distortions (generally found on unregistered video DACs).
__________Applications Information
General
Figure 1 shows a typical application using the MAX5018 in a color-raster circuit. The MAX5018 requires few external components and is extremely easy to use. The MAX5018's very high operating speeds require good circuit layout, supply decoupling, and proper transmissionline design. For best performance, note the following considerations.
MAX5018
Input Considerations
Video-input data and controls can be directly connected to the MAX5018. Note that all ECL inputs are terminated as closely to the device as possible to reduce ringing, crosstalk, and reflections. Maxim recommends that stripline or microstrip techniques be used for all ECL interfaces. A convenient and commonly used microstrip impedance is about 130, which is easily terminated using a 330 resistor to VEE and a 220 resistor to ground. This arrangement gives a Thevenin-equivalent termination of 130 to -2V without the need for a -2V supply. Standard single in-line package (SIP) 220/330 resistor networks are available for this purpose. Figure 2 shows equivalent input circuits.
Output Considerations
The analog outputs are designed to directly drive a dual 50 or 75 load-transmission system as shown in Figure 1. The MAX5018 output source impedances are high-impedance current sinks. The load impedance (RL) must be 25 or 37.5 to attain standard RS-343-A video levels. Any deviation from this impedance affects the resulting video output levels proportionally. As with the data interface, it is important that all analog transmission lines have matched impedance throughout, including connectors and transitions between printed wiring and coaxial cable. The combination of matched source-termination resistor RS and load terminator RL minimizes reflections of both forward and reverse traveling waves in the analog transmission system.
Table 1. The MAX5018 Family and Speed Designations
PART MAX5018A UPDATE 275Msps COMMENTS Suitable for 1200 x 1500 to 1500 x 1800 displays at 60Hz to 90Hz update rate. Suitable for 1024 x 1280 to 1200 x 1500 displays at 60Hz to 90Hz update rate.
Power Considerations
The MAX5018 has two analog power-supply pins and operates from a standard -5.2V single supply. Proper supply bypassing augments the MAX5018's inherent supply-noise-rejection characteristics. As shown in Figure 1, each supply pin should be bypassed as close to the device as possible with 0.01F and 10F capacitors.
MAX5018B
165Msps
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8-Bit, High-Speed DAC MAX5018
Figure 1. Typical Interface Circuit
This device also has two analog ground pins (VCC). Tie both ground pins to the analog ground plane. All power and ground pins must be connected in any application. If a +5V power source is required, the VCC ground pins become the positive supply pins, while the VEE supply pins become the ground pins. The relative polarities of the other input and output voltages must be maintained.
Reference Considerations
The MAX5018 has two reference inputs (Ref+ and Ref-). The input pins are connected to the inverting and noninverting inputs of an internal amplifier that serves as a reference buffer amplifier. The buffer amplifier's output is the reference for the current sinks. The amplifier feedback loop is connected
around one of the current sinks for better accuracy. (See Figure 3.) Since the analog output currents are proportional to the digital input data and ISet, full-scale output can be adjusted by varying the reference current. ISet is controlled through the MAX5018's Ref+ input. Figure 1 shows the method and the necessary equations for setting I Set . The MAX5018 uses an external negativevoltage reference. The external reference must be stable to achieve a satisfactory output, and Ref- should be driven through a resistor to minimize offsets caused by bias current. To change the full-scale output, vary the value for ISet with the 500 trimmer. A double 50 load (25) can be driven if ISet is increased by 50% for doubly terminated 75 video applications.
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8-Bit, High-Speed DAC MAX5018
VCC
Ref In
Conv
ISet
Conv I Bias VEE
Reference Segment Switch
IBias
IBias
IBias VEE
Data and Controls
V
80 k
VEE
Figure 2. Equivalent Input Circuits--Data, Clock, Controls, and Reference
Compensation
The MAX5018 provides an external compensation input (COMP) for the reference buffer amplifier. To use this pin correctly, connect a capacitor between COMP and VEE, as shown in Figure 1. Keep lead lengths as short as possible. Use a large capacitor (0.01F) if the reference is to be kept as a constant. The capacitor's value determines the amplifier's bandwidth. If reference modulation is required, smaller capacitance values can be used to achieve up to a 1MHz bandwidth.
video outputs: sync, blank, bright, and reference white (force high). Feedthrough control is also provided. All of the controls and data inputs are ECL compatible. In addition, all have internal pulldown resistors to leave them at a logic low so the pins are inactive when not used. This feature is useful if the devices are applied as standard DACs without the need for video controls, or if fewer than eight bits are used. The MAX5018 is usually configured in synchronous mode. In this mode, the controls and data are synchronized to prevent pixel dropout. This reduces screenedge distortions and provides the lowest output noise while maintaining the highest conversion rate. With the FT control open (low), each rising edge of the convert clock (CONV) latches decoded data and control values into a D-type internal register. The switched-current
Data Inputs and Video Controls
The MAX5018 has standard, single-ended data inputs. The inputs are registered to produce the lowest differential data-propagation delay (skew) to minimize glitching. Also, four video-control inputs generate composite
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8-Bit, High-Speed DAC MAX5018
Figure 3. Reference Buffer and DAC Output Circuit
sinks convert the registered data into the appropriate analog output. When FT is tied high, the control inputs and data are not registered. The analog output asynchronously tracks the input data and video controls. Feedthrough itself is asynchronous and is usually used as a DC control. To be registered synchronously, control and data inputs must be present at the input pins for a specific setup time (t s ) before and a specific hold time (t H ) after CONV's rising edge. Setup and hold times are not important in asynchronous mode. The minimum pulse widths high (tPWH) and low (tPWL), as well as settling time, become the limiting factors (Figure 4). The video controls produce the output levels needed for horizontal blanking, frame synchronization, etc., to be compatible with video-system standards as described in RS-343-A. Table 2 shows the videocontrol effects on the analog output. Internal logic governs blank, sync, and force high so that they override the data inputs as needed in video applications. Sync overrides both the data and other controls to produce full negative video output (Figure 5). Reference-white, video-level output is provided by force high, which drives the internal digital data to full-scale output (100IRE units). Bright gives an additional 10% of full-scale value to the output level. This function can be used in graphic displays for highlighting menus, cursors, or warning messages. If the devices are used in nonvideo applications, the video controls can be left open.
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Convert Clock
For best performance, the clock should be differentially ECL driven by using CONV and CONV (Figure 6). Driving the clock in this manner minimizes clock noise and power-supply/output intermodulation. The clock's rising edge synchronizes the data and control inputs to the MAX5018. Since CONV determines the actual switching threshold of CONV, the clock can be driven single-ended by connecting a bias voltage to CONV. This bias voltage sets the converter clock's switching threshold.
Analog Outputs
The MAX5018 has two analog outputs that are highimpedance, complementary current sinks. The outputs vary in proportion to the input data, controls, and reference-current values so that the full-scale output can be changed by setting ISet. In video applications, the outputs can drive a doubly terminated 50 or 75 load to standard video levels. In the standard configuration shown in Figure 7, the output voltage is the product of the output current and load impedance and is between 0V and -1.07V. Out(Figure 5) provides a video output waveform with the Sync pulse bottom at -1.07V. Out+ is inverted with Sync up.
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8-Bit, High-Speed DAC MAX5018
tPWH CONV -1.3 V CONV tPWL tS tH
-1.3 V
Data Control Inputs
tDST tDSC
1/2 LSB
OUT OUT + tSI
1/2 LSB
Figure 4. Timing Diagram
IRE 110 100
0 mV -73 mV
Bright Normal High (White)
256 Gray Levels
Video
Normal Low (Black) 7.5 0 -728 mV -781 mV Blank
-40
-1071 mV
Sync
Figure 5. Video-Output Waveform for Standard Load
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8-Bit, High-Speed DAC MAX5018
Table 2. Video-Control Operation (output values for setup: 10IRE, 75 standard load)
SYNC 1 0 0 0 0 0 0 0 BLANK X 1 0 0 0 0 0 0 REF WHITE X X 1 1 0 0 0 0 BRIGHT X X 1 0 0 0 1 1 DATA INPUT X X X X 000... 111... 000... 111... OUT- (mA) 28.57 20.83 0.00 1.95 19.40 1.95 17.44 0.00 OUT- (V) -1.071 -0.781 0.000 -0.073 -0.728 -0.073 -0.654 0.000 OUT- (IRE) -40 0 110 100 7.5 100 17.5 110 DESCRIPTION Sync Level Blank Level Enhanced High Level Normal High Level Normal Low Level Normal High Level Enhanced Low Level Enhanced High Level
Figure 6. CONV, CONV Switching Levels
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8-Bit, High-Speed DAC MAX5018
a)
MAX5018
b)
Figure 7. Standard Load (a) and Test Load (b)
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8-Bit, High-Speed DAC MAX5018
________________________________________________________Package Information
PDIPN.EPS
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
12 __________________Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 (408) 737-7600 (c) 1997 Maxim Integrated Products Printed USA is a registered trademark of Maxim Integrated Products.

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